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 HD74HC4543
BCD-to-Seven Segment Latch/Decoder/Driver
REJ03D0655-0200 (Previous ADE-205-544) Rev.2.00 Mar 30, 2006
Description
This circuit contains a 4-bit latch, BCD-to-7 segment decoder, and 7 output drivers. Data on the input pins flow through to the output when the Latch Disable (LE) is high and is latched on the high to low transition of the LE input. The Phase input (Ph) controls the polarity of the 7 segment outputs. When Ph is low the outputs are true 7 segment, and when Ph is high the outputs are inverted 7 segment. When the Phase input is driven by a liquid crystal display (LCD) backplane waveform the segment pins output the correct segment waveform for proper LCD AC drive voltages. In addition a Blanking input (BI) is provided, which will blank the display.
Features
* * * * * * High Speed Operation: tpd (A, B, C, D to a - g) = 33 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) Ordering Information
Part Name HD74HC4543P HD74HC4543FPEL HD74HC4543RPEL Package Type DILP-16 pin SOP-16 pin (JEITA) SOP-16 pin (JEDEC) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) PRSP0016DH-B (FP-16DAV) PRSP0016DG-A (FP-16DNV) Package Abbreviation P FP RP -- EL (2,000 pcs/reel) EL (2,500 pcs/reel) Taping Abbreviation (Quantity)
Note: Please consult the sales office for the above package availability.
Rev.2.00 Mar 30, 2006 page 1 of 8
HD74HC4543
Function Table
LD X H H H H H H H H H H H H H H H H L BI H L L L L L L L L L L L L L L L L L Ph* L L L L L L L L L L L L L L L L L L
1
Inputs D X L L L L L L L L H H H H H H H H X
C X L L L L H H H H L L L L H H H H X
B X L L H H L L H H L L H H L L H H X
A X L H L H L H L H L H L H L H L H X
a L H L H H L H H H H H L L L L L L
b L H H H H H L L H H H L L L L L L
c L H H L H H H H H H H L L L L L L
d L H L H H L H H L H H L L L L L L *2
Outputs e L H L H L L L H L H L L L L L L L
f L H L L L H H H L H H L L L L L L
g L L L H H H H H L H H L L L L L L
Display Blank 0 1 2 3 4 5 6 7 8 9 Blank Blank Blank Blank Blank Blank *1
Notes: 1. For liquid crystal readouts, apply a square wave to Ph. For common cathode LED readouts, select Ph = L. For common anode LED readouts, select Ph = H 2. Depends upon the BCD coder previously applied when LD = H
a f e d g c b
Pin Arrangement
Latch Disable C B D A Phase Blanking GND 1 2 3 4 5 6 7 8 (Top view) C B D A Ph Bl LD f g e d c b 16 VCC 15 f 14 g 13 e 12 d 11 c 10 b 9 a
a
Rev.2.00 Mar 30, 2006 page 2 of 8
HD74HC4543
Logic Diagram
Phase Blanking
A
IN
Q a
LD
Q
b
B
IN
Q
c
LD
Q d
C
IN
Q
e LD Q
D
IN
Q f
LD
Q
g
Latch Disable
Absolute Maximum Ratings
Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Symbol VCC VIN, VOUT IIK, IOK IOUT ICC or IGND PT Tstg Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 25 50 500 -65 to +150 Unit V V mA mA mA mW C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
Rev.2.00 Mar 30, 2006 page 3 of 8
HD74HC4543
Recommended Operating Conditions
Item Supply voltage Input / Output voltage Operating temperature Input rise / fall time*1 Note: Symbol VCC VIN, VOUT Ta tr, tf Ratings 2 to 6 0 to VCC -40 to 85 0 to 1000 0 to 500 0 to 400 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Unit V V C ns Conditions
VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V
Electrical Characteristics
Item Input voltage Symbol VCC (V) VIH 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 Min 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.18 5.68 -- -- -- -- -- -- -- Ta = 25C Typ Max -- -- -- -- -- -- 2.0 4.5 6.0 -- -- 0.0 0.0 0.0 -- -- -- -- -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.26 0.26 0.1 4.0 Ta = -40 to+85C Unit Min Max 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.13 5.63 -- -- -- -- -- -- -- -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.33 0.33 1.0 40 V Test Conditions
VIL
V
Output voltage
VOH
V
Vin = VIH or VIL IOH = -20 A
VOL
V
Vin = VIH or VIL
IOH = -4 mA IOH = -5.2 mA IOL = 20 A
Input current Quiescent supply current
Iin ICC
IOH = 4 mA IOH = 5.2 mA A Vin = VCC or GND A Vin = VCC or GND, Iout = 0 A
Rev.2.00 Mar 30, 2006 page 4 of 8
HD74HC4543
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Item Propagation delay time Symbol VCC (V) tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Pulse width tw 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 -- Ta = 25C Min Typ Max -- -- -- -- -- -- -- -- -- -- -- -- 80 16 14 100 20 17 50 10 9 -- -- -- -- -- 33 -- -- 22 -- -- 18 -- -- 35 -- -- 5 -- -- 2 -- -- 1 -- -- 5 -- 5 400 80 68 300 60 52 300 60 52 400 80 68 -- -- -- -- -- -- -- -- -- 75 15 13 10 Ta = -40 to +85C Min Max -- -- -- -- -- -- -- -- -- -- -- -- 100 20 17 125 25 21 65 13 11 -- -- -- -- 500 100 86 380 76 66 380 76 66 500 100 86 -- -- -- -- -- -- -- -- -- 95 19 16 10 Unit ns Test Conditions A, B, C or D to a - g
ns
Blanking to a - g
ns
Phase to a - g
ns
Latch Disable to a - g
ns
Setup time
tsu
ns
Hold time
th
ns
Output rise/fall time Input capacitance
tTLH tTHL Cin
ns
pF
Test Circuit
VCC VCC
A
See Function Table
Output a Output g CL = 50 pF CL = 50 pF
Input Pulse Generator Zout = 50 Input Pulse Generator Zout = 50
B C D LD Ph BI
Note : 1. CL includes probe and jig capacitance.
Rev.2.00 Mar 30, 2006 page 5 of 8
HD74HC4543
Waveforms
* Waveform - 1
A to D BI*, Ph tr
90% 50% 10% 90% 50% 10%
tf VCC 0V
tPLH, tPHL * a to g
10% 90% 50%
tPLH, tPHL
90% 50% 10%
VOH VOL
tTLH, tTHL
tTLH, tTHL
Note : 1. Input waveform: PRR 1 MHz, Zo = 50 , tr 6 ns, tf 6 ns
* Waveforn - 2
VCC A to D 0V tr LD
10% 90% 50%
VCC 0V
tPLH, tPHL
90%
VOH
50%
a to g
10%
VOL
tTLH, tTHL Note : 1. Input waveform: PRR 1 MHz, Zo = 50 , tr 6 ns, tf 6 ns
* Waveform - 3
tr
90% 50% 10% 90% 50%
tf VCC
10%
LD tsu
90%
tw tsu
90% 50% 10%
0V VCC
th
50%
A to D
10%
0V
tr/tf
tr/tf
Note : 1. Input waveform: PRR 1 MHz, Zo = 50 , tr 6 ns, tf 6 ns
Rev.2.00 Mar 30, 2006 page 6 of 8
HD74HC4543
Package Dimensions
JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV MASS[Typ.] 1.05g
D
16
9
1 0.89 b3
8
Z
A1
A
E
Reference Symbol
Dimension in Millimeters
Min
e
bp
e1
c
( Ni/Pd/Au plating )
e1 D E A A1 bp b3 c e Z L
Nom Max 7.62 19.2 20.32 6.3 7.4 5.06
L
0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0 15 2.29 2.54 2.79 1.12 2.54
JEITA Package Code P-SOP16-5.5x10.06-1.27
RENESAS Code PRSP0016DH-B
Previous Code FP-16DAV
MASS[Typ.] 0.24g
*1
D F 9
16
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
E
Index mark
*2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
8 bp x M L1
Reference Dimension in Millimeters Symbol
c
A1
y
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 10.06 10.5 5.50
0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0 8 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15
Rev.2.00 Mar 30, 2006 page 7 of 8
A
HD74HC4543
JEITA Package Code P-SOP16-3.95x9.9-1.27 RENESAS Code PRSP0016DG-A Previous Code FP-16DNV MASS[Typ.] 0.15g
*1
D 9
F
16
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
E HE
Index mark
*2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
c
8 bp x M L1
Reference Dimension in Millimeters Symbol
A1
L
y
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 9.90 10.30 3.95
0.10 0.14 0.25 1.75 0.34 0.40 0.46 0.15 0.20 0.25 0 8 5.80 6.10 6.20 1.27 0.25 0.15 0.635 0.40 0.60 1.27 1.08
Rev.2.00 Mar 30, 2006 page 8 of 8
A
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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